TY  - EJOU
AU  - 
T1  - Interactive Algorithms for the Verification of the Equality between Complex and Simplified Boolean-Algebra Expressions in Digital Decoders
T2  - Review of Computer Engineering Research

PY  - 2020
VL  - 7
IS  - 1
SN  - 2410-9142

AB  - This work highlights the use of an algorithm in evaluating and verifying a complex Boolean expression that are used in fabricating digital decoder systems. Digital decoders are built by human beings and, unfortunately, humans make mistakes. Both design errors and faulty implementation may lead both the hardware and software components of systems to behave in unexpected ways, which in turn may lead to business losses and even risky situations. Karnough maps, Boolean algebra theorems and laws are some of the techniques that can be used to simplify and reduce complex Boolean algebra expressions and truth table can be used to confirm that the reduced Boolean algebra expression is the same as the original, complex Boolean algebra expression. However, generating the truth table manually is tedious, especially when the Boolean algebra equation or expression has many Boolean variables. Therefore, this work presents novel algorithms to verify and evaluate complex Boolean expression from the fabricated decoder circuit. 
KW  - Digital decoder
KW  - Boolean algebra expression
KW  - Seven-segmented display
KW  - Combinational logic gate
KW  - Verification
KW  - Algorithms
KW  - Applications.
DO  - 10.18488/journal.76.2020.71.27.37